UbiSwitch Port Configuration: USXGMII on Port 0 and SFP+ on Ports 9 & 10

We are integrating the UbiSwitch into one of our designs and are planning to use all 3x 10G ports.

We want to connect two of these ports (Port 9 & 10) to SFP+ modules, and the remaining port (Port 0) directly to a SERDES interface of an SoM to operate in USXGMII mode.
I see the port mode configuration of the UbiSwitch can now be done via the BloxOsLite UART interface, which means we do not have to modify the module bootstrapping resistors.

I have a few questions:

  • I understand that we would only need to change the mode of Port 0 to USXGMII, as the other two ports (Port 9 & 10) are in 10GBASE-R mode by default which would work as intended for the connected SFP+ modules – is this correct?

  • If I configure Port 0 to USXGMII mode and directly connect the SERDES interface of the SoM to the UbiSwitch Port 0 SERDES interface, are there any further hardware considerations I need to make for this connection to work?

  • I know that the more common connection for the SoM SERDES interface would be directly to a PHY, but the above connection would be using it in MAC to MAC configuration. Can you confirm that your switch IC 88E6393X can operate in this way?

  • Since I do not have access to the switch IC datasheet, I cannot confirm the connection scheme of back-to-back MACs (i.e. Tx → Rx, or Tx → Tx). Is this information that you can provide? I have seen conflicting reports online about which scheme is suitable.

  • Lastly, I see your carrier board reference design did not include AC caps on the SERDES interfaces going to the SFP cage. I intend to add some 100nF to the SERDES between the SoM and the UbiSwitch and could add some to the SFP cage connections as well unless you had a reason to omit them?

Answers:

  • Q: I understand that we would only need to change the mode of Port 0 to USXGMII, as the other two ports (Port 9 & 10) are in 10GBASE-R mode by default which would work as intended for the connected SFP+ modules – is this correct?
    A: That’s correct!

  • Q: If I configure Port 0 to USXGMII mode and directly connect the SERDES interface of the IMX95 to the UbiSwitch Port 0 SERDES interface, are there any further hardware considerations I need to make for this connection to work?
    A: We’d first need to check that the IMX95 uses USXGMII rather than something like 10GBASE-R. Do you have the datasheet? If so, can you share the specifications for the 10G MAC port? With that, we can check compatibility.

  • Q: I know that the more common connection for the SOM SERDES interface would be directly to a PHY, but the above connection would be using it in MAC to MAC configuration. Can you confirm that your switch IC can operate in this way?
    A: Yes, this is possible and supported. We’ll just need to check that the exact specifications of the USXGMII interface line up with what the IMX95 is expecting, but the 10G MAC ports of the UbiSwitch can connect directly to a CPU’s MAC. Normally Port 0 is used for this connection.

  • Q: Since I do not have access to the switch IC datasheet, I cannot confirm the connection scheme of back-to-back MACs (i.e. Tx → Rx, or Tx → Tx). Is this information that you can provide? I have seen conflicting reports online about which scheme is suitable.
    A: Tx on UbiSwitch (for example, P0TX_P / P0TX_N) are outputs from UbiSwitch. These need to connect to the corresponding inputs on the IMX95. Typically, this means TX on UbiSwitch connects to RX on IMX95, and vice versa.

  • Q: Lastly, I see your carrier board reference design did not include AC caps on the SERDES interfaces going to the SFP cage. I intend to add some 100nF to the SERDES between the SOM and the UbiSwitch and could add some to the SFP cage connections as well unless you had a reason to omit them?
    A: SFF-8431 (the specification that defines the electrical interface for SFPs) states that the capacitors should be in the module, not on the host board, so don’t add them to your host board(see here, page 43).