How to connect an external PHY to SerDes 10G interface

Hello,

I need to connect an external PHY (AQR113) to SerDes 10G interface of the switch, how can I do that and how to connect management interface signals.

Thanks!

Hi there,

Yes, you can use an AQR113 with one of the 10G SerDes interfaces on UbiSwitch.

The three 10G-capable ports on UbiSwitch — ports 0, 9 and 10 — are MAC/SerDes interfaces without an integrated PHY. The AQR113 is suitable because its system-side interface supports USXGMII.

For the data interface, connect the signals as follows:

  • UbiSwitch PnTX_P/N → AQR113 system-side RX_P/N
  • AQR113 system-side TX_P/N → UbiSwitch PnRX_P/N

In other words, TX from UbiSwitch is an output and should connect to RX on the PHY, and vice versa.

When connecting the SerDes interface directly to a PHY rather than to an SFP module, add 0.1 µF AC-coupling capacitors in series with the SerDes signals. UbiSwitch does not contain AC-coupling capacitors on these three ports.

The SerDes pairs should be routed as controlled-impedance 100 Ω differential pairs. We recommend keeping the intra-pair skew below 0.1 mm and the routing as short and direct as practical.

You will also need to configure the UbiSwitch MAC port for USXGMII. The ports are configured as 10GBASE-R by default. For example, if you are using port 0:

port 0 mac mode usxgmii
conf save port

For ports 9 or 10, substitute the appropriate port number.

AQR113 management interface

The management interface of the AQR113 is separate from the SerDes data interface. The AQR113 uses a standard Clause 45 MDIO interface consisting primarily of MDC and MDIO.

There are two ways you can handle this.

The approach we would normally recommend is to connect the AQR113 MDC and MDIO signals to a microcontroller/processor on your baseboard and manage the PHY directly from there. The AQR113 supports either 1.8 V or 3.3 V management I/O, so configure its I/O voltage appropriately for your host. You should also connect the PHY reset signal and optionally its interrupt output if your application needs them.

One additional AQR113-specific consideration is that the PHY contains firmware which must be loaded at startup. This can be done from an external SPI flash attached to the AQR113, or by loading the image over MDIO. For a standalone baseboard design, using the external flash/reference implementation is generally the simpler approach. The AQR113 power supplies, clocking, boot configuration, magnetics and MDI-side layout should otherwise follow the Marvell/Aquantia reference design.

If you send us your schematic once you have the AQR113 section laid out, we also offer a paid design review service, the cost is modest compared with the cost of a design mistake. Reach out to info@botblox.com if you’re interested in a quote on that.

Hi,

Thanks a lot for your prompt and fast replay!

One additional question, please: if I connect two UbiSwitch modules via their 10Gb interface, shall I put AC-coupling capacitors.

Thanks!

Yes if you connect the 10G SerDes interface of one UbiSwitch directly to the 10G SerDes interface of another UbiSwitch, you should add AC-coupling capacitors.

UbiSwitch does not have AC-coupling capacitors fitted internally on its 10G SerDes ports. When an SFP/SFP+ module is used, the capacitors are provided inside the SFP module, which is why they are not fitted on our standard baseboard.

For a direct UbiSwitch-to-UbiSwitch connection, we recommend placing 0.1 µF (100 nF) capacitors in series with each SerDes signal.

You only need one capacitor per signal path — you should not place a second set at the other end. Therefore, for the bidirectional 10G connection there will be four capacitors in total:

  • 2 × 100 nF on UbiSwitch A TX → UbiSwitch B RX
  • 2 × 100 nF on UbiSwitch B TX → UbiSwitch A RX

The differential connections should be TX → RX and RX → TX.

Also ensure that the 10G ports on both UbiSwitch modules are configured to the same compatible SerDes mode.