- Copied from a customer email -
Does the latest SPEBlox device require a jumper for setting master/slave or is this auto negotiated?
You have to set it manually using the solder jumper on the back.
- Copied from customer email -
One more question for you, appreciate the quick response. Could you share the switching frequency of the regulator you use on your board? Just trying to get an idea where any noise may live.
Below is a list of the frequencies currently existent on the board:
3.3V DCDC Switching Regulator: 400KHz
1.0V DCDC Switching Regulator: 2.2MHz
1000BASE-T PHY clock frequency: 25MHz
1000BASE-T1 PHY clock frequency: 25MHz
1000BASE-T Ethernet Fundamental Frequency: 125MHz
1000BASE-T1 Ethernet Fundamental Frequency: 600MHz
I have two SPEBlox connected to each other and I’m seeing noise at the following frequencies:
Slave: 338.75 kHz (plus 677.5 kHz, 1.016 MHz harmonics)
Master: 323.75 kHz (plus 647.5 kHz, 971.25 kHz harmonics)
Seems to be coming from L1 on the bottom of the board. Any idea of what may be done to reduce this noise? I’ve tried power with 9V batter and disconnected the 4-pair connections on both ends but still see the noise.
Where do you see this noise? On the voltage of the power supply, or are you probing the EMC emissions? If you’re probing voltage, what lines are you probing?
The fundamental frequencies on the board are:
Vin to 3.3V DCDC Regulator = 400KHz
3.3V to 1V regulator = 2.2MHz
Some level of noise is always going to be expected, how much are you seeing in terms of magnitude.
When probing directly to the input power lines, I go from a -100 dBm noise floor to -30 dBm for 325/338 kHz, and up to -45 dBm from -100 dBm for the 648/677 kHz signals.
The same noise is seen when probing radiated emissions near the L1 inductors on both SPEBlox’s, with both a lab PS and a 9V battery.
Any chance you can attach a scope capture here so I can review?
Hi Josh,
Below you’ll see the image I get when I connect directly to the input power terminals and observe the 0 – 1MHz spectrum:
Notice the large peaks at the frequencies I mentioned previously.
When I observe 0 – 1 Ghz connected to input power, I notice the 125 MHz clock, which is of course expected. It’s about 35 dBm (-95 dBm to -60 dBm spike). I don’t yet have access to that image.
Thank you,
The 125MHz is expected as you say.
The others must be harmonics from the power regulators. I guess my question is, what prompted this investigation? Are you seeing issues in your system?
Incidentally we do have EMC testing planned for SPEBlox later in May which should give some level of pass/fail understanding of this.
Hi Josh,
Doing some noise exploration before adding to our system as we recently went through a noise investigation for some other parts of our system.
Looking forward to the May test results!
Thank you,
Sure, I’ll try to remember to post the results here. Failing that, add yourself to our mailing this, we announce test results periodically.